Journal Articles
M. Plauth, F. Feinbube, F.Schlegel, and A. Polze, “A Performance Evaluation of Dynamic Parallelism for Fine-Grained, Irregular Workloads,” International Journal of Networking and Computing, Vol 6, No 2, 2016.
[BibTex]
@article{ citemaster_101271,
author = {Max Plauth and Frank Feinbube and Frank Schlegel and Andreas Polze },
title = {{A Performance Evaluation of Dynamic Parallelism for Fine-Grained, Irregular Workloads}},
journal = {{International Journal of Networking and Computing}},
volume = {6},
issue = {2},
year = {2016},
}
C. Neuhaus, F. Feinbube, and A. Polze, “A Platform for Interactive Software Experiments in Massive Open Online Courses,” Transactions of the SDPS: Journal of Integrated Design and Process Science (JIDPS), 2014.
[BibTex]
@article{ citemaster_10127,
author = {Christian Neuhaus and Frank Feinbube and Andreas Polze },
title = {{A Platform for Interactive Software Experiments in Massive Open Online Courses}},
journal = {{Transactions of the SDPS: Journal of Integrated Design and Process Science}},
year = {2014},
citemaster_short_journal = {{JIDPS}},
}
F. Feinbube, J.-A. Sobania, P. Tröger, and A. Polze, “Hybrid.Parallel - Light-Weight Programming of Hybrid Systems,” Parallel Cloud Computing, vol. 1, no. 2, pp. 34–44, 2012.
[BibTex]
@article{ citemaster_9605,
author = {Frank Feinbube and Jan-Arne Sobania and Peter Tr{\"o}ger and Andreas Polze },
title = {{Hybrid.Parallel - Light-Weight Programming of Hybrid Systems}},
publisher = {{World Academic Publishing}},
pages = {{34-44}},
url = {http://www.vkingpub.com/Journal/PCC/139.html},
journal = {{Parallel {\&} Cloud Computing}},
year = {2012},
volume = {1},
issue = {2},
isbn = {{2304-9464}},
citemaster_epub_year = {{2012}},
citemaster_epub_day = {{31}},
citemaster_epub_month = {{10}},
}
[Abstract]
The advent of homogeneous many-core processors has been widely noticed as a major shift in the architecture of commodity computer systems. It has influenced the design of operating systems and programming models and gives a boost to high-level parallelization libraries. Future commodity systems will combine homogeneous many-core processors with graphical processing units and other special purpose accelerators to a new class of architecture called hybrid system. These systems provide improved hardware support for specialized computational tasks of different applications. In contrast to the programming for homogeneous architectures with existing tools, programming for such hybrid architectures is still in its infancy. Today, the software development for such systems explicitly has to address vendor-specific and version-specific characteristics of the particular devices. Due to this, refactoring of existing code becomes a tedious and error-prone task. We present our approach for automatically transforming high-level parallel code written in .NET to parallel code suitable for direct execution on hybrid systems. Our approach relies on the transformation of .NET byte code to an accelerator-aware version, which makes the concept applicable to all .NET-supported programming languages. Hybrid system hardware is targeted by the generation of accelerator-neutral intermediate code, which makes our approach applicable for a wider class of accelerator types. We show the feasibility of our solution with a workload that consists of well-known and widely accepted compute-intense algorithmic problems.
[Link]
F. Feinbube, P. Tröger, and A. Polze, “Joint Forces: From Multithreaded Programming to GPU Computing,” IEEE Software (Software), vol. 28, no. 1, pp. 51–57, Oct. 2010.
[BibTex]
@article{ citemaster_7921,
author = {Frank Feinbube and Peter Tr{\"o}ger and Andreas Polze },
title = {{Joint Forces: From Multithreaded Programming to GPU Computing}},
publisher = {{IEEE Computer Society}},
doi = {{10.1109/MS.2010.134}},
pages = {{51-57}},
url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5601687},
journal = {{IEEE Software}},
month = oct,
volume = {28},
year = {2010},
issue = {1},
isbn = {{0740-7459}},
day = {14},
citemaster_short_journal = {{Software}},
citemaster_accession_number = {{11698403}},
}
[Abstract]
Using graphics hardware to enhance CPU-based standard desktop applications is a question not only of programming models but also of critical optimizations that are required to achieve true performance improvements
[Link]
P. Tröger, A. Rasche, F. Feinbube, and R. Wierschke, “SOA Meets Robots - A Service-Based Software Infrastructure for Remote Laboratories,” International Journal of Online Engineering (iJOE), vol. 4, no. 2, 2008.
[BibTex]
@article{ citemaster_8315,
author = {Peter Tr{\"o}ger and Andreas Rasche and Frank Feinbube and Robert Wierschke },
title = {{SOA Meets Robots - A Service-Based Software Infrastructure for Remote Laboratories}},
publisher = {{Kassel University Press}},
url = {http://online-journals.org/index.php/i-joe/article/view/507},
journal = {{International Journal of Online Engineering (iJOE)}},
volume = {4},
year = {2008},
issue = {2},
isbn = {{1861-2121}},
}
[Abstract]
With the ongoing internationalization of virtuallaboratories, the integration aspect becomes moreimportant. The meanwhile commonly accepted ’glue’ forsuch legacy systems are service oriented architectures, basedon standardized and accepted Web service standards.We present our concept of the ’experiment as a service’,where the idea of service-based architectures is applied tovirtual remote laboratories. In our laboratory middleware,experiments are represented as stateful serviceimplementations and jobs as logical service instances ofthese implementations. We discuss performance, reliability,security and monitoring issues in this approach, and showhow the resulting infrastructure - the Distributed ControlLab - is applied in the European VetTrend project.
[Link]
Conference Papers
F. Feinbube, M. Plauth, M. Knaust, and A. Polze, “Data Partitioning Strategies for Stencil Computations on NUMA Systems,” in 23rd International European Conference On Parallel And Distributed Computing, 2017 - submitted.
[BibTex]
W. Hagen, M. Plauth, F. Eberhardt, F. Feinbube, and A. Polze, “PGASUS: A Framework for C++ Application Development on NUMA Architectures,” in International Symposium on Computing and Networking (CANDAR), 2016.
[BibTex]
M. Plauth, F. Feinbube, F. Schlegel, and A. Polze, “Using Dynamic Parallelism for Fine-Grained Irregular Workloads: A Case Study of the N-Queens Problem,” in International Symposium on Computing and Networking (CANDAR), 2015.
[BibTex]
M. Plauth, F. Feinbube, P. Tröger, and A. Polze, “FastICA on Modern GPU Architectures,” in 15th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT), 2015.
[BibTex]
@conference{ citemaster_10190,
author = {{Max } Plauth and {Frank } Feinbube and {Peter } Tr{\"o}ger and {Andreas } Polze },
title = {{FastICA on Modern GPU Architectures}},
year = {2015},
shorttitle = {{PDCAT}},
booktitle = {{15th International Conference on Parallel and Distributed Computing, Applications and Technologies}},
location = {{Hong Kong}},
citemaster_conference_year = {{2014}},
citemaster_conference_month = {{12}},
}
C. Neuhaus, F. Feinbube, D. Janusz, and A. Polze, “Secure Keyword Search over Data Archives in the Cloud,” in 5th International Conference on Cloud Computing and Services Science, (CLOSER), 2015.
[BibTex]
@conference{ citemaster_10336,
author = {Christian Neuhaus and Frank Feinbube and Daniel Janusz and Andreas Polze },
title = {{Secure Keyword Search over Data Archives in the Cloud: Performance and Security Aspects of Searchable Encryption}},
year = {2015},
organization = {{ACM}},
shorttitle = {{CLOSER}},
booktitle = {{5th International Conference on Cloud Computing and Services Science, }},
location = {{Lisbon, Portugal}},
citemaster_conference_day = {{20}},
citemaster_conference_end_month = {{5}},
citemaster_conference_end_day = {{22}},
citemaster_conference_month = {{5}},
citemaster_conference_year = {{2015}},
citemaster_conference_end_year = {{2015}},
}
C. Neuhaus, F. Feinbube, A. Polze, and A. Retik, “Scaling Software Experiments to the Thousands,” in 6th International Conference on Computer Supported Education (CSEDU), 2014.
[BibTex]
@conference{ citemaster_10126,
author = {Christian Neuhaus and Frank Feinbube and Andreas Polze and Arkady Retik },
title = {{Scaling Software Experiments to the Thousands}},
booktitle = {{6th International Conference on Computer Supported Education}},
shorttitle = {{CSEDU}},
year = {2014},
location = {{Barcelona}},
citemaster_conference_year = {{2014}},
}
F. Khalid, F. Feinbube, and A. Polze, “Hybrid CPU-GPU Pipeline Framework,” in 20th International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), 2014.
[BibTex]
@conference{ citemaster_10129,
author = {Fahad Khalid and Frank Feinbube and Andreas Polze },
title = {{Hybrid CPU-GPU Pipeline Framework}},
year = {2014},
shorttitle = {{PDPTA}},
booktitle = {{20th International Conference on Parallel and Distributed Processing Techniques and Applications}},
citemaster_conference_year = {{2014}},
}
F. Feinbube, P. Tröger, J. Henning, and A. Polze, “Leveraging Hybrid Hardware in New Ways- The GPU Paging Cache,” in 19th IEEE International Conference on Parallel and Distributed Systems (ICPADS), 2013.
[BibTex]
@conference{ citemaster_10107,
author = {Frank Feinbube and Peter Tr{\"o}ger and Johannes Henning and Andreas Polze },
title = {{Leveraging Hybrid Hardware in New Ways- The GPU Paging Cache}},
publisher = {{IEEE}},
doi = {{10.1109/ICPADS.2013.49}},
isbn = {{1521-9097}},
organization = {{IEEE}},
year = {2013},
shorttitle = {{ICPADS}},
booktitle = {{19th IEEE International Conference on Parallel and Distributed Systems}},
address = {{Seoul, Korea}},
citemaster_conference_month = {{12}},
citemaster_conference_end_month = {{12}},
citemaster_conference_end_day = {{18}},
citemaster_conference_day = {{15}},
citemaster_conference_year = {{2013}},
citemaster_conference_end_year = {{2013}},
}
F. Feinbube, B. Rabe, M. von Löwis, and A. Polze, “NQueens on CUDA: Optimization Issues,” in 2010 Ninth International Symposium on Parallel and Distributed Computing, 2010, pp. 63–70.
[BibTex]
@conference{ citemaster_8174,
author = {Frank Feinbube and Bernhard Rabe and Martin L{\"o}wis and Andreas Polze },
title = {{NQueens on CUDA: Optimization Issues}},
publisher = {{IEEE Computer Society}},
doi = {{http://dx.doi.org/10.1109/ISPDC.2010.22}},
pages = {{63-70}},
url = {http://dl.acm.org/citation.cfm?id=1848298},
booktitle = {{ 2010 Ninth International Symposium on Parallel and Distributed Computing}},
address = {{Washington, DC, USA}},
year = {2010},
isbn = {{978-0-7695-4120-4}},
}
[Abstract]
Todays commercial off-the-shelf computer systems are multicore computing systems as a combination of CPU, graphic processor (GPU) and custom devices. In comparison with CPU cores, graphic cards are capable to execute hundreds up to thousands compute units in parallel. To benefit from these GPU computing resources, applications have to be parallelized and adapted to the target architecture. In this paper we show our experience in applying the NQueens puzzle solution on GPUs using Nvidia's CUDA (Compute Unified Device Architecture) technology. Using the example of memory usage and memory access, we demonstrate that optimizations of CUDA programs may have contrary results on different CUDA architectures. Evaluation results will point out, that it is not sufficient to use new programming languages or compilers to achieve best results with emerging graphic card computing.
[Link]
A. Rasche, F. Feinbube, P. Tröger, B. Rabe, and A. Polze, “Predictable interactive control of experiments in a service-based remote laboratory,” in 1st international conference on PErvasive Technologies Related to Assistive Environments (PETRA), 2008, pp. 1–7.
[BibTex]
@conference{ citemaster_842,
author = {Andreas Rasche and Frank Feinbube and Peter Tr{\"o}ger and Bernhard Rabe and Andreas Polze },
title = {{Predictable interactive control of experiments in a service-based remote laboratory}},
publisher = {{ACM}},
doi = {{http://doi.acm.org/10.1145/1389586.1389664}},
pages = {{1-7}},
url = {http://dl.acm.org/citation.cfm?id=1389664},
booktitle = {{1st international conference on PErvasive Technologies Related to Assistive Environments}},
shorttitle = {{PETRA}},
year = {2008},
isbn = {{978-1-60558-067-8}},
address = {{New York, NY, USA}},
location = {{Athens, Greece}},
citemaster_conference_year = {{2008}},
}
[Abstract]
Remote and virtual laboratories are commonly used in electronic engineering and computer science to provide hands-on experience for students. Web services have lately emerged as a standardized interfaces to remote laboratory experiments and simulators. One drawback of direct Web service interfaces to experiments is that the connected hardware could be damaged due to missed deadlines of the remotely executed control applications.
Within this paper, we suggest an architecture for predictable and interactive control of remote laboratory experiments accessed over Web service protocols. We present this concept as an extension of our existing Distributed Control Lab infrastructure. Using our architecture, students can conduct complex control experiments on physical experiments remotely without harming hardware installations.
[Link]
Workshop Papers
M. Plauth, W. Hagen, F. Feinbube, F. Eberhardt, L. Feinbube and A. Polze, “Parallel Implementation Strategies for Hierarchical Non-Uniform Memory Access Systems by Example of the Scale-Invariant Feature Transform Algorithm,” in Large-Scale Parallel Processing (LSPP) at the IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2016.
[BibTex]
M. Plauth, F. Eberhardt, F. Feinbube, and A. Polze, “A survey of security-aware approaches for cloud-based storage and processing technologies,” in HPI Cloud Symposium “Operating The Cloud” (OTC), 2015.
[BibTex]
J. Beilharz, F. Feinbube, F. Eberhardt, M. Plauth, and A. Polze, “Claud: Coordination, Locality and Universal Distribution,” in Mini Symposium on Coordination Programming (CoPro) at the 20th International Conference on Parallel Computing (ParCo), 2015.
[BibTex]
F. Feinbube, M. Plauth, K. Kieschnick, and A. Polze, “Evolving Scheduling Strategies for Multi-Processor Real-Time Systems,” in 11th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT), 2015.
[BibTex]
F. Khalid, F. Feinbube, and A. Polze, “Pattern-guided Big Data Processing on Hybrid Parallel Architectures,” in Informatik 2014 Workshop on System Software Support for Big Data (BigSys), 2014.
[BibTex]
@conference{ citemaster_10153,
author = {Fahad Khalid and Frank Feinbube and Andreas Polze },
title = {{Pattern-guided Big Data Processing on Hybrid Parallel Architectures}},
year = {2014},
shorttitle = {{BigSys}},
booktitle = {{Informatik 2014 Workshop on System Software Support for Big Data}},
citemaster_conference_year = {{2014}},
}
F. Feinbube, L. Herscheid, C. Neuhaus, D. Richter, B. Rabe, and A. Polze, “Quality Attributes for Cloud-based Software Systems,” in HPI Cloud Symposium “Operating The Cloud” (OTC), 2014.
[BibTex]
@conference{ citemaster_10337,
author = {Frank Feinbube and Lena Herscheid and Christian Neuhaus and Daniel Richter and Bernhard Rabe and Andreas Polze },
title = {{Quality Attributes for Cloud-based Software Systems}},
year = {2014},
shorttitle = {{OTC}},
booktitle = {{HPI Cloud Symposium 'Operating The Cloud'}},
location = {{Potsdam, Germany}},
citemaster_conference_year = {{2014}},
citemaster_conference_end_year = {{2014}},
}
F. Feinbube, L. Herscheid, C. Neijenhuis, and P. Tröger, “Scalable SIFT for NUMA Systems,” in Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platform (HeteroPar), 2014.
[BibTex]
@conference{ citemaster_10151,
author = {Frank Feinbube and Lena Herscheid and Christoph Neijenhuis and Peter Tr{\"o}ger },
title = {{Scalable SIFT for NUMA Systems}},
booktitle = {{Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platform}},
shorttitle = {{HeteroPar}},
year = {2014},
citemaster_conference_year = {{2014}},
citemaster_conference_month = {{8}},
}
Technical Reports
M. Plauth, F. Eberhardt, F. Feinbube, and A. Polze, “Implementation strategies for policy-aware federated cloud use cases,” in Future SOC Lab at the Hasso Plattner Institute, Potsdam, Germany, 2016.
[BibTex]
F. Eberhardt, F. Feinbube, M. Plauth, and A. Polze, “Optimization Techniques and Best Practices for Business-Class NUMA systems,” in Future SOC Lab at the Hasso Plattner Institute, Potsdam, Germany, 2015.
[BibTex]
F. Feinbube, F. Eberhardt, W. Hagen, M. Plauth, L. Herscheid and A. Polze, “Inspection and Evaluation of Modern Hardware Architectures,” in Future SOC Lab at the Hasso Plattner Institute, Potsdam, Germany, 2015.
[BibTex]
F. Feinbube, P. Troeger, “Evaluation of State-Of-The-Art Hybrid Hardware Architectures based on Application Bottlenecks,” in Future SOC Lab at the Hasso Plattner Institute, Potsdam, Germany, 2014.
[BibTex]
P. Tröger, “Study of Appropriate Algorithm Classes for State-Of-The-Art Hybrid Hardware Architectures,” Future SOC Lab at the Hasso Plattner Institute, Potsdam, Germany, 2014.
[BibTex]
@techreport{ citemaster_10338,
author = {Peter Tr{\"o}ger },
title = {{Study of Appropriate Algorithm Classes for State-Of-The-Art Hybrid Hardware Architectures: Future SOC Lab Report}},
publisher = {{Future SOC Lab at the Hasso Plattner Institute}},
institution = {{Hasso Plattner Institute}},
year = {2014},
address = {{Potsdam, Germany}},
}
F. Feinbube, “Hybrid parallel computing with Java,” Technische Berichte des Hasso-Plattner-Instituts für Softwaresystemtechnik an der Universität Potsdam, Universitätsverlag Potsdam, 2012.
[BibTex]
@misc{ citemaster_9671,
author = {Frank Feinbube },
title = {{Hybrid parallel computing with Java}},
publisher = {{Universit{\"a}tsverlag Potsdam}},
booktitle = {{Technische Berichte des Hasso-Plattner-Instituts f{\"u}r Softwaresystemtechnik an der Universit{\"a}t Potsdam}},
year = {2012},
}
[Abstract]
State-of-the-art computer systems are a combination of general purpose processors and special function accelerators. The most common type of accelerators are GPU compute devices, which are used for some years to compute a variety of data
parallel tasks fast and energy efficient. Since the release of Intel’s Sandy Bridge architecture and AMD’s APU technology graphic compute units are integrated into each new processor. Despite their wide availability only a relatively small amount of projects makes extensive use of these hybrid systems. That applies in particular to projects that are realized in standard languages like Java. One main reason for this is the fact that it is laborious to learn to use the software libraries for hybrid architectures and that a deep understanding of the characteristics of the underlying hardware is often necessary, as well. The burden of that this creates is often too much for small and mid-sized enterprises and project teams.
In this paper we show a way to allow such projects to get access to the hidden performance of hybrid systems while keeping the effort to learn new language constructs as low as possible. Our solution supports the development of new software projects as well as the refactoring of existing software systems.
F. Feinbube, “Task and Data Distribution in Hybrid Parallel Systems,” Technische Berichte des Hasso-Plattner-Instituts für Softwaresystemtechnik an der Universität Potsdam, Universitätsverlag Potsdam, 2011.
[BibTex]
@misc{ citemaster_9125,
author = {Frank Feinbube },
title = {{Task and Data Distribution in Hybrid Parallel Systems}},
booktitle = {{Technische Berichte des Hasso-Plattner-Instituts f{\"u}r Softwaresystemtechnik an der Universit{\"a}t Potsdam}},
publisher = {{Universit{\"a}tsverlag Potsdam}},
year = {2011},
}
[Abstract]
Computer architecture is shifting. The upper levels of the software stack are thus to be adapted in order to benefit from the current and future hardware capabilities. In this paper, we present the Hybrid.Parallel library. It is our approach to bridge the gap between state-of-the-art computer architecture and application developers (in contrast to performance engineers, tuning experts, ...) In order to exploit the full computing power of a system, all execution devices have to be identified and used. Tasks and data have to be distributed according to the specific features of the devices and the overall system. We present our analysis of tasks and data in the shared memory parallel domain and propose mappings onto execution units and memory types. Furthermore we discuss language constructs that allow developers to adjust these mappings to their needs. These findings provide the basis for the implementation of the scheduler for our Hybrid.Parallel library and may also be applied to the Single-Chip-Cloud-Computer.
[Download]
F. Feinbube, “Programming Models for Parallel Heterogeneous Computing,” Technische Berichte des Hasso-Plattner-Instituts für Softwaresystemtechnik an der Universität Potsdam, vol. 31, Universitätsverlag Potsdam, 2010.
[BibTex]
@misc{ citemaster_8057,
author = {Frank Feinbube },
title = {{Programming Models for Parallel Heterogeneous Computing}},
publisher = {{Universit{\"a}tsverlag Potsdam}},
volume = {31},
year = {2010},
isbn = {{978-3-86956-036-6}},
booktitle = {{Technische Berichte des Hasso-Plattner-Instituts f{\"u}r Softwaresystemtechnik an der Universit{\"a}t Potsdam}},
}
[Abstract]
Many of the computational problems we are facing today are complex and need huge computational power to be solved. It is well-known that processors will not continue to get faster, but will get more cores instead. More cores are not only harder to utilize by an application programmer, but also challenge hardware designers. Thus various new hardware architectures are designed and evaluated in order to find the ones that will fulfill the needs of future computer systems. Prototypic configuration boards like Intels Single Chip Cloud Computer (SCC) are an attempt to deal with the ever-increasing number of cores by removing essential features of current processors like hardware cache coherency. Another approach is to accompany common general purpose CPUs with sophisticated special purpose processing units. These so called Accelerators are easier to build and very fast for specific application purposes. They are the foundation for the new trend of hybrid computer systems.
[Download]
F. Feinbube, “On Progamming Models for Multi-Core Computers,” Technische Berichte des Hasso-Plattner-Instituts für Softwaresystemtechnik an der Universität Potsdam, vol. 27, Universitätsverlag Potsdam, 2009.
[BibTex]
@misc{ citemaster_8055,
author = {Frank Feinbube },
title = {{On Progamming Models for Multi-Core Computers}},
publisher = {{Universit{\"a}tsverlag Potsdam}},
volume = {27},
year = {2009},
isbn = {{978-3-940793-81-2}},
booktitle = {{Technische Berichte des Hasso-Plattner-Instituts f{\"u}r Softwaresystemtechnik an der Universit{\"a}t Potsdam}},
}
[Abstract]
Since services are hosted by application servers, shifts in the underlying systems have a great influence on their efficiency and functionality. Therefore it is necessary to get a deep understanding of trends in operating systems and middleware as well as hardware environments. This paper discusses some of these shifts. It will take a short look on energy efficiency and a deeper one on programming models for multicore computers. Thereby first the application of graphic cards for parallel computing will be evaluated using the example of CUDA. Then a brief summary on the limits of threads for the Windows platform is shown.
[Download]
Thesis
F. Feinbube, R. Wierschke, D. Richter, A. Schäfer, and P. Kruttke, “Entwicklung einer transnationalen experimentbasierten Lernumgebung im Leonardo-Da-Vinci-Programm der Europäischen Union,” 2007.
[BibTex]
@mastersthesis{ citemaster_8059,
author = {Frank Feinbube and Robert Wierschke and Daniel Richter and Alexander Sch{\"a}fer and Peter Kruttke },
title = {{Entwicklung einer transnationalen experimentbasierten Lernumgebung im Leonardo-Da-Vinci-Programm der Europ{\"a}ischen Union}},
school = {{Hasso Plattner Institute at the University of Potsdam}},
month = jun,
year = {2007},
howpublished = {\url{Operating Systems and Middleware Group}},
citemaster_degree = {{Ba}},
}
[Abstract]
Within the bachelor project ”DNA“ the Distributed Control Lab (DCL), that facilitates the usage of real-time control experiments, and the ASG-C5 component of the Adaptive Services Grid (ASG) for dynamic placement of services, were combined.
Thereby, the ASG-C5 component was reimplemented. Besides, a scheduling mechanism and a component that augments the WSDL of a service with state management methods was created. The new system is able to interoperate with execution environments for miscellaneous programming languages. An execution environment for .NET web services was realized. Furthermore, the data management was optimized for heterogeneous usage. In addition to the portation of existing DCL experiments, tools for the creation of new services were added. Also, the existing management interface was reimplemented and extended by algorithms for the analysis of measurement data.
The user interface was extended and revised in order to provide better usability for the experiments in the new system. The developed system allows the distributed usage of experiments or web services, that can be provided in miscellaneous programming languages. Within the VET-TREND project the new lab infrastructure will be available
to different partners throughout Europe.
[Download]
F. Feinbube, “Application Server Performance Evaluation,” Potsdam, 2009.
[BibTex]
@mastersthesis{ citemaster_8058,
author = {Frank Feinbube },
title = {{Application Server Performance Evaluation}},
school = {{Hasso Plattner Institute at the University of Potsdam}},
year = {2009},
howpublished = {\url{Operating Systems and Middleware Group}},
address = {{Potsdam}},
citemaster_degree = {{MSc}},
}
[Abstract]
Enterprise applications are becoming increasingly complex. To meet the high demands that are put on them you need sophisticated technologies that support the development of enterprise software and provide a platform to deploy programs in a scalable, flexible and secure environment. Such an environment is provided by the application server for the Java ™ Platform, Enterprise Edition. Standard benchmarks like the SPECjAppServer2004 benchmark are used as a decision aid which server fits best for a specific scenario. These benchmarks are representative for a widespread business scenario and evaluate the application server in terms of their performance in this. Although the importance of open source software is unbroken, there are currently no comparisons of the two popular application server JBoss and Glassfish using the SPECjAppServer2004 standard benchmark. This work fills this gap by investigating the JBoss and Glassfish application server in terms of their performance and their use of resources with the help of the SPECjAppServer2004 benchmark. Doing this, it provides an important contribution to the comparability of the two application server. It contains an overview of evaluation tools, a description of the SPECjAppServer2004 benchmark and related work. The main part of the paper is devoted to the evaluation of the Glassfish and JBoss application server and the comparison of their results. Finally, it contains an outlook on further topics and open questions.
[Download]
Web Page
F. Feinbube, “GPU Readings List,” 2010. [Online]. Available: http://www.dcl.hpi.uni-potsdam.de/research/gpureadings/.
[BibTex]
@misc{ citemaster_7849,
author = {Frank Feinbube },
title = {{GPU Readings List}},
url = {http://www.dcl.hpi.uni-potsdam.de/research/gpureadings/},
year = {2010},
}
[Link]
2014
F. Feinbube, “Scalable SIFT for NUMA with Actors,” in EuroPar 2014, HeteroPar Workshop, 2014.
2013
F. Feinbube, “MOOC with xCloud,” in HPI Future SOC Lab Day, 2013.
[Download]
F. Feinbube, “The Rise of Hybrid Computing,” HPI UCT Workshop, 15-Apr-2013.
F. Feinbube, “Leveraging Hybrid Hardware in New Ways: The GPU Paging Cache,” in ICPADS 2013, 2013.
[Download]
2012
F. Feinbube, “Code Mobilität: Adaptive Programmiermodelle für GPU-Computing,” Fachgruppentreffen Betriebssysteme, 08-Nov-2012.
[Download]
F. Feinbube, “Towards User-Friendly Hybrid Computing,” 12th Retreat of the HPI Research School, Apr-2012.
F. Feinbube, “Ongoing Research at the Operating Systems and Middleware Group, HPI,” Research Stay at Blekinge Institute of Technology, May-2012.
F. Feinbube, Hybrid Computing for Everyone. 2012.
[Download]
F. Feinbube, “Hybrid Computing at OSM,” 15-Feb-2012.
[Download]
F. Feinbube, “Hybrid Computing for Everyone,” HPI-Technion Workshop, 27-Feb-2012.
[Abstract]
Hybrid systems built of general purpose processors and special purpose accelerators, such as GPUs, are the next challenge for large-scale parallel processing. While CPU-oriented software development can rely on high-level programming models, the world of accelerators looks immature. Programming these devices currently requires a deep understanding of the underlying hardware structuring, in order to achieve correctness and performance. This talk introduces our work on high-level programming models and novel applications for heterogeneous parallel computer systems. We will discuss the different system layers affected by the paradigm shift, and show examples for a better exploitation of the new combined hardware capabilities.
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F. Feinbube, “Light-Weight GPU Computing,” HPI-Nanjing Workshop, 22-Nov-2012.
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2011
F. Feinbube, “Joint Forces: The Era of Hybrid Compute Environments,” HPI Symposium @ SAP, 06-Dec-2011.
[Abstract]
Hybrid systems built of general purpose processors and special purpose accelerators, such as GPUs, are the next challenge for large-scale parallel processing. While CPU-oriented software development can rely on high-level programming models, the world of accelerators looks immature. Programming these devices currently requires a deep understanding of the underlying hardware structuring, in order to achieve correctness and performance.
This talk introduces our work on high-level programming models and novel applications for heterogeneous parallel computer systems. We will discuss the different system layers affected by the paradigm shift, and show examples for a better exploitation of the new combined hardware capabilities.
[Download]
F. Feinbube, “Hybrid.Parallel.For – Programming Hybrid Parallel Systems with .NET,” 10th Retreat of the HPI Research School, Apr-2011.
F. Feinbube, “The future is hybrid - developer support for accelerator-based technologies,” HPI-UCT Workshop, 28-Apr-2011.
[Abstract]
Hybrid systems built of general purpose processors and special purpose accelerators are a promising way to deal with massive multi-core. Even today they help to speed-up a variety of applications from several domains. Programming these devices, though, still requires a deep understanding of the underlying hardware.
We present a proof-of-concept implementation of a general purpose library for the .NET Framework that abstracts from the hardware characteristics and allows developers to program OpenCL-enabled accelerators using their favorite high-level-language.
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F. Feinbube, “Data Access and Distribution in Hybrid Execution Environments,” 11th Retreat of the HPI Research School, 20-Oct-2011.
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F. Feinbube, “Heterogeneity, memory hierarchies, availability – challenges of manycore systems,” Intel European Research Innovation Conference, 12-Oct-2011.
[Abstract]
Besides the many cores of their CPUs, future computing systems will utilize additional processing units, such as GPU, krypto coprocessors, etc. Dynamic voltage and frequency scaling will lead to non-uniform behavior even among homogeneous compute units. Due to high integration density, probability of faulty system behavior will increase dramatically.
The talk will outline those challenges and present our research to tackle above-mentioned problems. We will present the hybrid.parallel project, an approach to transparently address CPU and GPU compute units from the same source base. Our cooperating hypervisor project on the Intel SCC addresses the question of how to manage memory hierarchies on future reconfigurable manycore systems. Finally, we will discuss how to apply multilevel fault prediction and proactive migration of virtual machines in order to deal with arbitrary faults in multicore hardware. Our research is being carried out within the FutureSOC lab @ HPI, a testbed infrastructure with prototype hardware that is supported by vendors such as Fujitsu, Hewlett-Packard, EMC, VMware, SAP.
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F. Feinbube, “Programming Models for Hybrid Parallel Systems,” Dagstuhl Graduate School Workshop, 21-Jun-2011.
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F. Feinbube, “Programming Models for Hybrid Parallel Systems,” Symposium on Future Trends in Service-Oriented Computing, 17-Jun-2011.
[Abstract]
Hybrid systems built of general purpose processors and special purpose accelerators are a promising way to deal with massive multi-core. Even today they help to speed-up a variety of applications from several domains. Programming these devices, though, still requires a deep understanding of the underlying hardware.
We present a proof-of-concept implementation of a general purpose library for the .NET Framework that abstracts from the hardware characteristics and allows developers to program OpenCL-enabled accelerators using their favorite high-level-language.
[Download]
[Link]
2010
F. Feinbube, “NQueens On CUDA - and beyond,” 8th Retreat of the HPI Research School, Apr-2010.
F. Feinbube, “Programming Models for Parallel Hybrid Computing,” 9th Retreat of the HPI Research School, 21-Oct-2010.
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F. Feinbube, “Programming Models for Hybrid Computing,” HPI-Technion Workshop, 22-Nov-2010.
F. Feinbube, “NQueens on CUDA Optimization Issues,” International Symposium on Parallel and Distributed Computing, 07-Jul-2010.
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F. Feinbube, “NQueens on CUDA,” Workshop - ConnectedLife Group, UNIK, Norway, 16-Mar-2010.
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2009
F. Feinbube, “On Programming Models for Multi-Core Computing,” 7th Retreat of the HPI Research School, 16-Oct-2009.
[Download]
2007
F. Feinbube, “Experiment-basierte Lernumgebung im Leonardo Da Vinci Programm der EU,” 4. HPI Bachelorpodium, 11-Oct-2007.
[Link]
2016
F. Eberhardt, M. Plauth, F. Feinbube, and A. Polze, “Resource Management on Power (WS 2016/2017),”
[Link]
C. Neuhaus, F. Feinbube, and A. Polze, “Non-functional properties in Operating Systems and Middleware (SS 2016),”
[Link]
F. Feinbube, and C. Neuhaus, and A. Polze, “Operating Systems II (SS 2016),” 2016.
[Link]
D. Richter, F. Feinbube, “Informatik ohne Stecker,” in HPI-Schülerkolleg.
Operating Systems and Middleware Research Group, “Research Seminar ‘Trends in Operating Systems’,” 2016.
[Link]
2015
F. Feinbube, F. Eberhardt, M. Plauth, and A. Polze, “Project Seminar: Parallel and Distributed Systems (WS 2015/2016),” 2015.
[Link]
Operating Systems and Middleware Research Group, “Research Seminar ‘Trends in Operating Systems’ (WS 2014/2015),” 2015.
F. Feinbube, F. Eberhardt, and A. Polze, “Programming of Parallel and Distributed Systems (SS 2015),” 2015.
[Link]
Operating Systems and Middleware Research Group, “Research Seminar ‘Trends in Operating Systems’ (SS 2015),” 2015.
[Link]
F. Eberhardt, F. Feinbube, and A. Polze, “Non-Uniform Memory Access (NUMA) Seminar (WS 2014/2015),” 2015.
[Link]
2014
F. Feinbube, “Natürliches Programmieren mit Scratch (WS 2013/2014),” in HPI-Schülerkolleg, 2014.
A. Polze, U. Hentschel, F. Feinbube, and D. Richter, “Embedded Operating Systems (WS 2013/2014),” 2014.
[Link]
P. Tröger, F. Feinbube, and F. Khalid, “Parallel Programming Concepts,” in Open HPI, 9000+ participants, 2014.
[Link]
F. Feinbube, “Betriebssysteme,” in Medieninformatik, 2014.
A. Polze, D. Richter, F. Feinbube, and C. Neuhaus, “Components Programming and Middleware (SS 2014),” 2014.
[Link]
A. Polze, F. Feinbube, and C. Neuhaus, “Operating Systems II (SS 2014),” 2014.
[Link]
2013
F. Feinbube, “GPU Compute Devices,” Parallel Programming Concepts (WS 2012/2013), Jan-2013.
[Download]
[Link]
F. Feinbube, “GPU Computing with OpenCL,” Parallel Programming Concepts (WS 2012/2013), Jan-2013.
[Download]
[Link]
F. Feinbube, C. Neuhaus, and A. Polze, “Operating Systems II (SS 2013),” 2013.
[Link]
P. Tröger and F. Feinbube, “Software Profiling Seminar,” 2013.
[Link]
P. Tröger and F. Feinbube, “Parallel Programming Concepts (SS 2013),” 2013.
[Link]
2012
F. Feinbube, “Exotic Methods in Parallel Computing [GPU Computing],” Exotic Methods in Parallel Computing, 21-May-2012.
[Link]
F. Feinbube, “Preproduction mit Scratch++,” HPI-Schülerkolleg, 24-Apr-2012.
[Download]
[Link]
F. Feinbube, “Exotic Methods in Parallel Computing [Introduction],” Exotic Methods in Parallel Computing, 16-Apr-2012.
[Link]
F. Feinbube, “Natürliches Programmieren mit Alice,” HPI-Schülerkolleg, 03-Apr-2012.
[Link]
F. Feinbube, “GPU Computing with OpenCL ,” Einführung in die Programmiertechnik (WS 2011/12), 02-Jan-2012.
[Download]
[Link]
F. Feinbube, “Natürliches Programmieren,” HPI-Schülerkolleg, 04-Dec-2012.
[Download]
F. Feinbube, “Masterprojekt 13 on 11,” HPI Masterprojekt, Oct-2012.
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2011
F. Feinbube, “Android,” Embedded Operating Systems (WS 2011/2012), 17-Nov-2011.
[Download]
[Link]
F. Feinbube, “GPU Computing with OpenCL,” Parallel Programming Concepts (WS 2011/2012), 2011.
[Download]
[Link]
F. Feinbube, “GPU Compute Devices,” Parallel Programming Concepts (WS 2011/2012), 2011.
[Download]
[Link]
P. Tröger and F. Feinbube, “Programming Models,” Parallel Programming Concepts (WS 2011/2012), 2011.
[Download]
[Link]
F. Feinbube, “MapReduce,” Parallel Programming Concepts (WS 2010/2011), 2011.
[Download]
[Link]
F. Feinbube, “GPU Computing with OpenCL,” Parallel Programming Concepts (WS 2010/2011), 2011.
[Download]
[Link]
2010
F. Feinbube, “Exkurs: Programmierung für GPGPU,” Komponentenprogrammierung und Middleware (SS 2010), 05-May-2010.
[Link]
2017
D. Röder, “Profiling and Performance Prediction based on Historical Data”
C. Würz, “Modelling Workload Interference”
K. Fabian, “Inference and Enrichment of Hierarchical Topology Graphs”
S. Köhler, “Harnessing the IBM Power Architecture for Resource-intensive Applications”
F. Teschke, “Novel Applications for Intel SGX”
2016
FutureSOC LAB @ HPI, “ScaLable And Secure Federation of Heterogeneous Cloud Systems (/CS) 2”
J. Beilharz, “Coordination Languages - scaling from NUMA nodes to Cloud Federations”
C. Sterz, “Analyzing NUMA Performance Based on Hardware Event Counters”
V. Schwarzer, An Evaluation of Unikernel Operating Systems for Cloud Computing”
W. Hagen, “A Programming model for C++ application development on Non-Uniform Memory Access architectures”
M. Knaust, “Partitioning 2D Data for Stencil Computations on NUMA Systems”
P. Schmidt, “Optimization Guidelines for NUMA Architectures”
2015
FutureSOC LAB @ HPI, “ScaLable And Secure Federation of Heterogeneous Cloud Systems (/CS)”
FutureSOC LAB @ HPI, “Optimization Techniques and Best Practices for Business-Class NUMA systems”
SAP, “NUMA4HANA II”
M. Lamina, “A Framework for Executing OpenCL Kernels in JVM Applications on Heterogeneous Hardware”
W. Hagen, “Scale-invariant feature transform (SIFT) on hierarchical NUMA systems”
2014
FutureSOC LAB @ HPI, “Evaluation of State-Of-The-Art Hybrid Hardware Architectures based on Application Bottlenecks”
FutureSOC LAB @ HPI, “Inspection and Evaluation Of Modern Hardware Architectures”
Horizon 2020 Program of the European Union, “Scalable and Secure Infrastructures for Cloud Operations (SSICLOPS)”. 2014-2017
SAP, “NUMA4HANA”
F. Feinbube, “CCGrid 2015 PC Member”
M. Plauth, “Audio Signal Processing on GPU Compute Devices”
C. Kieschnick, “Evolving of Prioritization Schemes for Real-Time Multicore Scheduling”
F. Schlegel, “GPU Load Balancing with Dynamic Parallelism”
R. Diestelkämper, “Hybrid.For OpenSource”
2013
FutureSOC LAB @ HPI, “Study of Appropriate Algorithm Classes for State-Of-The-Art Hybrid Hardware Architectures”
L. Schlegel, “Resource Management Mechanisms on Co-Processors”
M. Linkhorst, “Concurrent Tasks with Dynamic Parallelism on NVIDIA’s GK110 Architecture”
G. Yao, H. Lohse, N. Wuttke, T. Bünger, F. Zimmermann, C. Kieschnick, M. Kusber, and O. Xylander, “Masterprojekt 13 on 11”
2012
SAP and IBM, “NINA”
F. Feinbube, “Slack-Based Multiprocessor Scheduling of Periodic Real-Time Tasks”
J. Henning, “GPU-based Paging Cache”
2011
I. Jaeckel, “Multi-GPU and Data Access Patterns”
2010
European Union, BMBF and Brandenburg, “Fontane,” 2010-2013
H. Lohse, “Benchmarking Hybrid Architectures”
2009
F. Bornhofen and T. Bünger, “Threads vs Processes,” 2009-2011.